TDSE accepted as a full paper at the SDS 2026

Deploying deep learning models on resourceconstrained devices requires careful consideration of multiple and often conflicting constraints, including memory, energy consumption, accuracy, and latency. Existing TinyML deployment frameworks focus primarily on individual metrics or single-model optimization, leaving developers without systematic support for multi-constraint decision-making. In this work, we present TinyML Design Space Explorer (TDSE), a framework that simplifies AI model deployment across diverse embedded devices, improving flexibility and accessibility for edge AI. TDSE evaluates candidate model–hardware pairs across four key metrics and provides data-driven recommendations for optimal deployment under user-specified constraints. It leverages microTVM for model compilation and integrates both measured and estimated metrics to generate actionable deployment decisions. Empirical evaluation on ARM Cortex-M4 and M7 microcontrollers demonstrates viable deployments of neural networks varying in architectural complexity.